Running simulations
Simulations run on Subaya’s backend. You submit a testbench and a top module from
the CLI, wait for the result, then read the report, logs, and waveform. This guide
walks the full loop with suya sim.
Supported tools
Section titled “Supported tools”suya sim run can target any of these simulators with --tool:
| Tool | Notes |
|---|---|
ryusim |
RyuSim, Subaya’s SystemVerilog simulator |
verilator |
Verilator |
icarus |
Icarus Verilog |
questa |
Questa |
xsim |
Vivado xsim |
renode |
Renode (embedded) |
Run a simulation
Section titled “Run a simulation”At minimum, point suya sim run at your testbench and name the top module:
suya sim run --tb <path-to-testbench> --top <top-module>The project defaults from .subaya/config.toml; pass --project <project-id> to
override. Useful options:
suya sim run \ --tb tb/top_tb.sv \ --top top_tb \ --source rtl/ \ --tool verilator \ --tier S \ --wait \ --no-cache--source <dir>— the source directory to include alongside the testbench.--tool <name>— pick a simulator (see the table above).--tier <S>— request a compute tier for the run.--wait— block until the run finishes instead of returning immediately.--no-cache— force a fresh run, ignoring cached results.--arg <a>— pass an extra argument through to the tool (repeatable).
Read the results
Section titled “Read the results”List your recent runs to find a run id:
suya sim listGet the status and a results summary for a run:
suya sim report <run-id>Tail the logs, optionally following them live:
suya sim logs <run-id>suya sim logs <run-id> --followResubmit the same source and spec as a fresh run:
suya sim rerun <run-id> --waitWaveforms — hand off to wf
Section titled “Waveforms — hand off to wf”Locate the waveform artifact produced by a run:
suya sim wave <run-id>This points you at the waveform, which you analyze with the wf waveform CLI —
Subaya’s WAL-based waveform analysis tool.
Next steps
Section titled “Next steps”- Workspaces & projects — where simulations live.
- CLI: sim — the full
suya simreference.