Cloud toolchains & CubeMX

The tools that normally need a beefy workstation and a tangle of licenses run on Subaya’s backend instead. You drive them through the CLI and pay only for the compute seconds you use.

Cloud-hosted tools

Heavy tools run on Subaya’s backend, not your laptop:

• Quartus — Intel/Altera FPGA synthesis.
• RyuSim — Subaya’s SystemVerilog simulator.
• Renode — embedded system emulation.
• BitCrucible — hardware validation bridge.
• headless CubeMX — the authoritative validation and code-generation engine behind Subaya’s embedded pin-planning surface.

You never install these locally — the backend is the authoritative environment. See Billing & usage for how the metered compute works.

Embedded pin-planning with suya arch

For embedded (e.g. STM32) projects, Subaya exposes a pin-planning surface backed by the headless CubeMX engine. A pin-plan captures the MCU/board, pin assignments, peripheral configs, and clock-tree intent, and generates a CubeMX .ioc project file.

For a full worked example, see STM32 getting started.

Create a pin-plan

Start a plan from a supported dev board (the board contract gives you the LED, button, and virtual-COM-port pins for free) or from a bare MCU part:

# From a supported dev board
suya arch pin-plan create --board NUCLEO-L433RC-P

# …or from a bare MCU part
suya arch pin-plan create --mcu STM32F407VGTx

List and inspect plans:

suya arch pin-plan list
suya arch pin-plan show --plan <plan-id>

Set pins

Assign a signal to a physical pin:

suya arch pin set --plan <plan-id> --pin PA5 --signal GPIO_Output --label LED

Configure peripherals

Set a peripheral’s mode and parameters:

suya arch peripheral configure --plan <plan-id> --peripheral USART2 --mode Asynchronous

Set clock intent

Express clock-tree node intent:

suya arch clock set --plan <plan-id> ...

Validate

Run a structural validation. The headless CubeMX engine on the backend is the authoritative check:

suya arch validate --plan <plan-id>

Generate and commit the .ioc

Generate the .ioc from the plan, then commit it to the connected repo:

suya arch generate --plan <plan-id>   # produce the .ioc from the pin-plan
suya arch ioc commit                  # generate + commit the .ioc to the connected repo

The .ioc lands in your GitHub repo, ready to open in STM32CubeMX or drive further code generation.

Next steps

• STM32 getting started — the full worked example.
• CLI: arch — the full suya arch reference.